AMD’s new CPU patent reveals a 3D machine learning acceleration design

On September 25, 2020, AMD granted a patent for a unique processor that offers accelerated machine learning (ML) in an I / O or IOD cage. AMD can develop a chip-based system (SoCs) based on a data center with FPGA (Arrays Field Programmable Gate Arrays) or a machine learning accelerator for specific GPUs. AMD will likely add an FPGA or GPU to the top of its I / O processor, just as AMD will add a special cache to its latest processors.

AMD focuses on the latest patented innovations to accelerate the learning of 3D-stack machines

The technology is vital because it allows the company to add additional accelerator classes to upcoming SoCs. The patent by AMD does not guarantee that consumers will see a newly designed processor on the market. The company’s latest venture will allow users to see what the future holds with the right research and development in the first place. AMD has not disclosed any information about the latest patent, which means that we can only guess what the company plans to do for the new designs.

The AMD Ryzen 7 5800X3D gaming display shows impressive 3D V-Cache performance in CPU-related scenarios

The patent for “accelerated direct-learning machine learning” granted to AMD explains the potential use that the company could start with an ML-speed accelerator integrated into a processor with an IOD. The technology will consist of FPGA or GPU computing to process the ML workload on the IOD with a dedicated high-speed connector. AMD can start this design by adding a unique accelerator inside the local memory using memory connected to the IOD or a separate part not connected to the head of the IOD.

When “machine learning” is considered, it is usually synonymous with data centers. However, AMD needs to increase the load on its chips with this new technology. A patent by AMD allows the workload to be accelerated without the combination of expensive and custom silicon used in system chips. Advantages also include greater efficiency in power, data transfer, and greater capabilities.

The patent term seems to be due to the close offer to buy AMD / Xilinx strategically. Now that we are a little more than a year and a half after the proposal and see that the patent was finally published at the end of March 2022, we can see the new designs, if they come to fruition, still in 2023. The inventor named the patent AMD partner Maxim V. Kazakov.

The AMD SP5 socket is pictured in all its glory, the LGA 6096 for future EPYC CPUs with 96 cores and above

AMD is in the process of creating a new EPYC processor, code-named Genoa and Bergamo, that use a design with an I / O matrix in conjunction with an accelerator. It may be possible for AMD to build an AI processor within the Genoa and Bergamo series with machine learning accelerators.

Speaking of AMD’s EPYC line, the company is looking for a 600W cTDP or thermal design power for the fifth generation Turin EPYC processor. Turin EPYC CPUs offer twice the cTDP of the current EPYC 7003 Milan series. In addition, the company’s fourth and fifth Gen SP5 platforms offer EPYC processors with up to 700 watts of power consumption in the short term. With Genoa and Bergamo processors, if an ML accelerator is added to the processor, it will increase power consumption. Future server chipsets will benefit from vertical stacked accelerators, such as ML accelerator designs that were recently patented by AMD.

It should be noted that based on the disclosure here there are many possible options[…]

Suitable processors, for example, general-purpose processor, special-purpose processor, normal processor, graphics processor, machine learning processor, [a DSP, an ASIC, an FPGA]and other types of integrated circuits (ICs).

[…] Such processors can be produced by configuring the production process using the results of processing instructions for the hardware description language (HDL) and other intermediate information, including network lists (such instructions that can be stored on a computer readable).

– Extracted from AMD’s patented ‘Direct Machine Learning Sedator’

With the help of Xilinx technology, the company can now offer computer-oriented GPU designs, FPGA stable designs, a series of programmable processors from Pensando, and a stable x86 microarchitecture. The many chipset designs that are seen in the AMD Infinity Fabric interconnect technology are now a reality for the company. Data center processors with a vertical stack offer more options for enterprises, with multi-layer APUs for data centers and processors built with N4X TSMC performance nodes and integrated with a graphics processor or FPGA accelerator with N3 process optimization technology.

An important consideration of AMD’s published patent is the technology itself to accelerate machine learning and its place in the future of consumer-based CPUs. AMD is universally incorporating accelerators into its line of future products, allowing it to have a more diverse portfolio that places them at the forefront of data center applications and customer-specific applications.

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